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Microprocessor (CBSE (UGC) NET)

Description: MP
Number of Questions: 15
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Tags: MP Digital Systems and Microprocessors
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Which of the following instructions in 8086 is used to store the contents of AH register to lower byte of the flag register?

  1. SAHF

  2. LAFH

  3. PUSHF

  4. LEA

  5. LDS


Correct Option: A
Explanation:

SAHF stands for Store AH Register into Flags. This instruction in 8086 is used to store the contents of AH register to lower byte of the flag register.

Which of the following I/O modes in 8255 allows handshake signals to exchange between the microprocessor and peripherals prior to data transfer?

  1. Mode 0

  2. Mode 1

  3. Mode 2

  4. IBF

  5. INTR


Correct Option: B
Explanation:

This I/O mode in 8255 allows handshake signals to exchange between the microprocessor and peripherals prior to data transfer.

Which of the following microprocessor chips is sometimes used to refer to all 45 nm chips with the core architecture?

  1. Nehalem

  2. Sandy bridge

  3. Lynnfield

  4. Penryn

  5. Ivy bridge


Correct Option: D
Explanation:

Penryn is sometimes used to refer all 45 chips with core architecture.

Which of the following directives in assembly language is used with assembler to start the memory allotment for the particular segment?

  1. LABEL

  2. NAME

  3. GROUP

  4. ORG

  5. END


Correct Option: D
Explanation:

The origin directive tells the assembler where to load instructions and data into memory. This directive in assembly language is used with assembler to start the memory allotment for the particular segment.

Which of the following directives used in assembly language programming is used to direct the assembler to reserve 4 words of memory for the specified variable and may initialize it with the specified values?

  1. DT

  2. DQ

  3. DB

  4. DW

  5. ASSUME


Correct Option: B
Explanation:

 The DQ directive tells the assembler to declare a variable four words in length or to reserve four words of storage in memory.

Which of the following instructions in 8085 helps in code conversion by accessing the codes from a look up table?

  1. STOS

  2. REP

  3. XLAT

  4. Macro

  5. Procedure


Correct Option: C
Explanation:

XLAT is used for code conversion by accessing them from look up table.

Which of the following arithmetic instructions in 8086 is used to make sure that the result of adding two packed BCD numbers is adjusted to be a valid BCD number?

  1. AAA

  2. DAA

  3. ADC

  4. ADD

  5. INC


Correct Option: B
Explanation:

DAA stands for Decimal Adjust AL after addition. This arithmetic instruction in 8086 is used to make sure that the result of adding two packed BCD numbers is adjusted to be a valid BCD number.

Which of the following instructions in 8085 microprocessor stops the execution of microprocessor and forces the microprocessor to enter into wait state?

  1. NOP

  2. ESC

  3. HALT

  4. LOCK

  5. JNB


Correct Option: C
Explanation:

HALT instruction forces the microprocessor to stop execution and enter into wait state.

Which of the following string instructions in 8086 stores the AL/AX register contents to a location in the string pointed by the ES : DI pair?

  1. REP

  2. STOS

  3. CMPS

  4. SCAN

  5. MOV


Correct Option: B
Explanation:

STOS stands for Store String String Instruction. This string instruction in 8086 stores the AL/AX register contents to a location in the string pointed by the ES : DI pair.

Which of the following registers in 8259A Programmable Interrupt Controller is used to store all the interrupt levels which are requesting service?

  1. Interrupt Request Register

  2. Interrupt Mask Register

  3. INTA

  4. R/W Control Logic

  5. SP/EN


Correct Option: A
Explanation:

This register in 8259A Programmable Interrupt Controller is used to store all the interrupt levels which are requesting service.

Which of the following ports in 8255 microprocessor are basically bidirectional I/O pins that act as latched outputs or buffered inputs depending upon the control word loaded into the control word register?

  1. D0-D7

  2. PB0-PB7

  3. PA0-PA7

  4. PC0-PC7

  5. RD


Correct Option: C
Explanation:

These ports in 8255 microprocessor are basically bidirectional I/O pins that act as latched outputs or buffered inputs depending upon the control word loaded into the control word register.

Which of the following instructions in flag manipulation instruction is used to set the direction flag equal to 1 which causes string instructions to autodecrement SI or DI registers?

  1. STC

  2. STD

  3. STI

  4. CLC

  5. CLD


Correct Option: B
Explanation:

STC instruction sets the carry flag and causes the string instructions to autodecrement SI or DI registers.

Which of the following address decoding techniques in microprocessor is the one in which the memory chip is selected for the specified logic level on the address lines and no other logic levels can select the chip?

  1. Linear decoding

  2. block decoding

  3. Absolute decoding

  4. CMOS

  5. BIOS


Correct Option: C
Explanation:

This address decoding technique in microprocessor is the one in which the memory chip is selected for the specified logic level on the address lines and no other logic levels can select the chip.

Which of the following fields in assembler instruction format is a symbolic abbreviation for the operation to be performed?

  1. Label

  2. Operation code

  3. Operand

  4. Comments

  5. Exit


Correct Option: B
Explanation:

This field in assembler instruction format is a symbolic abbreviation for the operation to be performed.

Which of the following functional units in 8086 pipelined architecture is used to handle all the data and address on the buses for the execution unit?

  1. Execution unit

  2. BUS interface unit

  3. Stack pointer

  4. ALU

  5. Control unit


Correct Option: B
Explanation:

This functional unit in 8086 pipelined architecture is used to handle all the data and address on the buses for the execution unit.

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