Consider the given circuit. In this circuit, the race around

When the output Y in the circuit below is ‘1’, it implies that data has

Assuming that flip-flops are in reset condition initially, the count sequence observed at Q_A in the circuit shown is

The two numbers represented in signed 2s complement form are P + 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2s complement is

The Boolean function f implemented in figure using two input multiplexers is

The point P in the following figure is stuck-at-1. The output f will be

A 4 bit ripple counter and a 4 bit synchronous counter are made using flip-flops having a propagation delay of 10 ns each. If the worst case delay in the ripple counter and the synchronous counter be R and S respectively, then

The minimum number of 2- to -1 multiplexers required to realize a 4- to -1 multiplexers is

In the circuit shown

The logic function implemented by the circuit below is (ground implies logic 0)

The Boolean function Y = AB + CD is to be realized using only 2-input NAND gates. The minimum number of gates required is

Directions : Two products are sold from a vending machine, which has two push buttons P1 and P2. When a button is pressed, the price of the corresponding product is displayed in a 7 - segment display. If no buttons are pressed, '0' is displayed signifying 'Rs 0'. If only P1 is pressed, '2' is displayed, signifying 'Rs. 2'. If only P2 is pressed, '5' is displayed, signifying 'Rs. 5'. If both P1 and P2 are pressed, 'E' is displayed, signifying 'Error' The names of the segments in the 7 - segment display, and the glow of the display for '0', '2', '5' and 'E' are shown below.

Consider (1) push buttons pressed/not pressed in equivalent to logic 1/0 respectively. (2) a segment glowing/not glowing in the display is equivalent to logic 1/0 respectively.

What are the minimum numbers of NOT gates and 2 - input OR gates required to design the logic of the driver for this 7 - Segment display?

The figure the internal schematic of a TTL AND-OR-OR-Invert (AOI) gate. For the inputs shown in the figure, the output Y is

The output of the 74 series of TTL gates is taken from a BJT in

If X = 1 in logic equation $[X+Z{\bar Y+(\bar Z + X \bar Y ) }] \ [\bar X + \bar Z(X+Y)]$ = 1 then

A new Binary Coded Pentary (BCP) number system is proposed in which every digit of a base-5 number is represented by its corresponding 3-bit binary code. For example, the base-5 number 24 will be represented by its BCP code 010100. In this numbering system, the BCP code 100010011001 corresponds to the following number in base-5 system

Directions : Two products are sold from a vending machine, which has two push buttons P1 and P2. When a button is pressed, the price of the corresponding product is displayed in a 7 - segment display. If no buttons are pressed, '0' is displayed signifying 'Rs 0'. If only P1 is pressed, '2' is displayed, signifying 'Rs. 2' If only P2 is pressed '5' is displayed, signifying 'Rs. 5' If both P1 and P2 are pressed, 'E' is displayed, signifying 'Error' The names of the segments in the 7 - segment display, and the glow of the display for '0', '2', '5' and 'E' are shown below.

Consider (1) push buttons pressed/not pressed in equivalent to logic 1/0 respectively. (2) a segment glowing/not glowing in the display is equivalent to logic 1/0 respectively.

If segments a to g are considered as functions of P1 and P2, which of the following is correct?

An 8085 assembly language program is given below. Line 1: MVI A, B5H 2: MVI B, 0EH 3: XRI 69H 4: ADD B 5: ANI 9BH 6: CPI 9FH 7: STA 3010H 8: HLT

The contents of the accumulator just after execution of the ADD instruction in line 4 will be

An 8085 assembly language program is given below. Line 1: MVI A, B5H 2: MVI B, 0EH 3: XRI 69H 4: ADD B 5: ANI 9BH 6: CPI 9FH 7: STA 3010H 8: HLT

After execution of line 7 of the program, the status of the CY and Z flags will be

The transistors used in a portion of the TTL gate shown in figure have ^_$\beta$ = 100 ,the base-emitter voltage is 0.7 V for a transistor in active region and 0.75 V for a transistor in saturation. If the sink current I = 1 mA and the output is at logic 0, then the current I_R will be equal to

Two D flip-flops are connected as a synchronous counter that goes through the following Q_BQ_A sequence 00^{_{$\rightarrow$}}11^{_{$\rightarrow$}}01^{_{$\rightarrow$}}10^{_{$\rightarrow$}}00^{_{$\rightarrow$}}… The combination to the inputs D_A and D_B are

In the sum of products function f(X, Y, Z) = ^{$\sum (2,3,4,5)$}, the prime implicants are

The state transition diagram for the logic circuit shown is

The circuit shown in figure has 4 boxes each described by inputs P, Q, R and outputs Y, Z with Y = P $\oplus$Q $\oplus$R Z = RQ + $\bar P R + Q\bar P$

The circuit acts as a

In a microprocessor, the service routine for a certain interrupt starts from a fixed location of memory which cannot be externally set, but the interrupt can be delayed or rejected. Such an interrupt is