In the following limiter circuit, an input voltage V_i = 10 sin 100 $\pi$t is applied. Assume that the diode drop is 0.7 V when it is forward biased. The zener breakdown voltage is 6.8 V. The maximum and minimum values of the output voltage respectively are

If the differential voltage gain and the common mode voltage gain of a differential amplifier are 48 dB and 2 dB respectively, then its common mode rejection ratio is

The circuit below implements a filter between the input current ii and the output voltage v_o. Assume that the opamp is ideal. The filter implemented is a

Assume that the $\beta$ of transistor is extremely large and V_BE = 0.7V, I_C and V_CE in the circuit are shown in the figure.

Identify the circuit in the following figure?

For an npn transistor connected as shown in figure, V_BE = 0.7 Volts. Given that reverse saturation current of the junction at room temperature 300°K is 10^-13 A, the emitter current is

In the Op-Amp circuit shown, assume that the diode current follows the equation I = I_s exp (V/V_T). For V_i = 2V, V₀ = V₀₁, and for V_i = 4 V, V₀ = V₀₂. The relationship between V₀₁ and V₀₂ is

If the op-amp in figure is ideal, the output voltage V_out will be equal to

In the following a stable multivibrator circuit, which properties of v₀ (t) depend on R₂?

In the circuit shown below, assume that the voltage drop across a forward biased diode is 0.7 V. The thermal voltage V_t = kT/q = 25 mV and small signal input v_i = V_p cos $\omega t$ where V_p = 100 mV.

The ac output voltage v_ac is

In the amplifier circuit shown in figure, the values of R₁ and R₂ are such that the transistor is operating at V_CE = 3V and I_C = 1.5mA when its $\beta$is 150. For a transistor with $\beta$of 200, the operating point (V_CE, I_C) is

In the circuit shown below, assume that the voltage drop across a forward biased diode is 0.7 V. The thermal voltage V_t = kT / q = 25mV. The small signal input v_i = V_p cos $\omega t$ where V_p = 100 mV.

The bias current I_DC through the diodes is

An ideal op-amp is an ideal

In the circuit shown below, capacitors C₁ and C₂ are very large and are shorts at the input frequency. v_i is a small signal input. The gain magnitude $\left | \dfrac{V_0}{V_1} \right |$ at 10 M

The correct full wave rectifier circuit is

The circuit shown in figure is best described as a

The amplifier circuit shown below uses a silicon transistor. The capacitors C_C and C_E can be assumed to be short at signal frequency and the effect of output resistance R₀ can be ignored. If C_E is disconnected from the circuit, which one of the following statements is TRUE?

The circuit shown in a

The cascode amplifier is a multistage configuration of