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Digital Logic

Description: Logical design system Digital Systems and MicroprocessorsDigital LogicIT Certificate Programs
Number of Questions: 15
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Tags: Logical design system Digital Systems and Microprocessors Digital Logic IT Certificate Programs
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In which of the following addressing modes, the displacement is computed relative to the IP in 8086 processor?

  1. Intersegment Direct Addressing Mode

  2. Intersegment Indirect Addressing Mode

  3. Intrasegment Direct

  4. Direct Addressing Mode

  5. Instruction


Correct Option: C
Explanation:

Here, the displacement is computed relative to the IP in 8086 processor.

In which of the following, the complement output of the ring counter is fed back to the input, instead of the true output?

  1. Ring Counter

  2. Johnson Counter

  3. Shift Register

  4. Resolution

  5. ADC


Correct Option: B
Explanation:

Here, the complement output of a ring counter is fed back to the input instead of the true output.

In which of the following modes, the byte contains bits that specify a register or register pair, in which the data is located in 8085 processor?

  1. Register Addressing Mode

  2. Register Indirect Branch Addressing Mode

  3. Direct Branch Addressing Mode

  4. Direct Addressing Mode

  5. Immediate Addressing Mode


Correct Option: A
Explanation:

Here, the byte contains bits which specify a register pair in which the data is located in 8085 processor.

Which of the following shifts data into internal storage elements and shifts data out at the serial out, data out, pin?

  1. Shift Register

  2. Serial In Serial Out Shift Register

  3. Ring Counter

  4. Serial In, Parallel Out Shift Register

  5. DAC


Correct Option: D
Explanation:

It shifts data into internal storage elements and shifts data out at the serial out, data out, pin.

In which of the following modes, the byte contains bits that specify a register pair, which in turn contains the address of the data in memory in 8085 processor?

  1. Register Indirect Branch Addressing Mode

  2. Direct Branch Addressing Mode

  3. Direct Addressing Mode

  4. Immediate Addressing Mode

  5. Register Indirect Mode


Correct Option: E
Explanation:

Here, the byte contains bits which specify a register pair, which in turn contains the address of the data in memory in 8085 processor.

In which of the following logics, the output depends on two condition simultaneously, then output is true only when both the inputs were true?

  1. NAND Logic

  2. NOR Logic

  3. AND Logic

  4. Ex-OR Logic

  5. Step Recovery


Correct Option: C
Explanation:

The outputs depends on two conditions simultaneously, then output is true only when both the inputs were true.

In which of the following logic gates, if the output depends on any one of the two conditions given, then output is true when any of the two inputs or both of them were true?

  1. NOR Logic

  2. OR Logic

  3. EX-OR Logic

  4. EX-NOR Logic

  5. NAND Logic


Correct Option: B
Explanation:

The output depends on any one of the two conditions given, then output is true when any of the two inputs or both of them were true.

Which of the following addressing modes may be used only in unconditional branch instructions in 8086 processor?

  1. Intrasegment Indirect Addressing Mode

  2. Intersegment Direct Addressing Mode

  3. Intersegment Indirect Addressing Mode

  4. Immediate Addressing Mode

  5. Register Indirect Addressing Mode


Correct Option: A
Explanation:

It may be used only in unconditional branch instructions in 8086 processor.

In which of the following addressing modes, the instruction directly specifies the absolute location of the data in 8085 processor?

  1. Direct Addressing Mode

  2. Immediate Addressing Mode

  3. Intersegment Direct Addressing Mode

  4. Direct Branch Mode

  5. Direct Mode


Correct Option: E
Explanation:

The instruction directly specifies the absolute location of the data in 8085 processor.

Which of the following circuits accepts three one bit inputs and generates a sum and a carry output?

  1. Half Adder

  2. Full Adder

  3. Half Subtractor

  4. NAND Logic

  5. NOR Logic


Correct Option: B
Explanation:

It accepts three one bit inputs and generates a sum and a carry output.

In which of the following modes, if the 16 bit value is used, the bytes are reversed as with the second byte containing the low order byte, and the third byte containing the high order byte in 8085 processor?

  1. Register Indirect Branch Mode

  2. Direct Branch Mode

  3. Immediate Mode

  4. Register Addressing Mode

  5. Based Indexed Mode


Correct Option: C
Explanation:

If the 16 bit value is used, the bytes are reversed as with the second byte containing theow order byte, and the third byte containing the higher order byte in 8085 processor.

Which of the following logic circuits performs the subtraction of two bits with borrow generated if any, during the previous LSB subtraction?

  1. Half Adder

  2. Half Subtractor

  3. Full Subtractor

  4. EX-OR Logic

  5. NAND Logic


Correct Option: C
Explanation:

It performs the subtraction of two bits with borrow generated if any, during the previous LSB subtraction.

Which of the following provides a means of loading a byte immediately into a register or a memory address in 8085 processor?

  1. LXI Instruction

  2. MVI Group

  3. MOV Group

  4. Register Indirect Branch Mode

  5. Instruction


Correct Option: B
Explanation:

It provides a means of loading a byte immediately into a register or a memory address in 8085 processor.

Which of the following circuits must be able to operate in accordance that if there is carry generated while adding the two 4 bit numbers, the result is an invalid sum?

  1. Half Subtractor

  2. Half Adder

  3. Parallel Binary Adder

  4. BCD Adder

  5. NAND Logic


Correct Option: D
Explanation:

A BCD Adder circuit must be able to operate in accordance that if there is carry generated while adding the two 4 bits numbers the result is an invalid sum.

Which of the following instructions provides a means of moving a byte between the accumulator and a RAM address in 8085 processor?

  1. LXI Instruction

  2. LHLD and SHLD

  3. MOV Group

  4. Instruction

  5. LDA and STA


Correct Option: E
Explanation:

These instructions provide a means of moving a byte between the accumulator and a RAM address in 8085 processor.

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