The following binary values were applied to the X and Y inputs of the NAND latch shown in the figure in the sequence indicated below: X = 0, Y = 1; X = 0, Y = 0; X = 1, Y = 1. The corresponding stable P, Q outputs will be

For the circuit shown below, the counter state (Q₁, Q₀) follows the sequence

Figure shows a ripple counter using positive edge triggered flip-flops. If the present state of counter is Q₂Q₁Q₀ = 011, then its next state (Q₂Q₁Q₀) will be

In the modulo-6 ripple counter shown in the figure below, the output of the 2- input gate is used to clear the J-K flip-flop. The 2-input gate is

The Boolean expression AC + $B\bar C$ is equivalent to

The number of memory cycles required to execute the following 8085 instructions: (i) LDA 3000 H (ii) LXI D, FOF1H would be

A 4-bit D/A converter is connected to a free-running 3-bit UP counter, as shown in the following figure. Which of the following waveforms will be observed at V₀?

If the functions W, X, Y and Z are as follows: W = R + ^{$\bar P Q + \bar RS$} X = PQ^{$\bar R \bar S + \bar P \bar Q \bar R \bar S + P \bar Q \bar R \bar S$} Y = RS + ^{$\overline{PR + P \bar Q + \bar P \bar Q}$} Z = R + S + ^{$\overline{PQ + \bar P \bar Q \bar R + P \bar Q \bar S}$} then

A 0 to 6 counter consists of 3 flip flops and a combination circuit of 2 input gate(s). The combination circuit consists of

For the circuit shown in figure below, two 4-bit parallel-in serial-out shift registers loaded with the data shown are used to feed the data to a full-adder. Initially, all the flip-flops are in clear state. After applying two clock pulses, what will be the outputs of the full-adder?

Two D-flip-flops, as shown below, are to be connected as a synchronous counter that goes through the following Q₁ Q₀ sequence 00 ^{_{$\rightarrow$}} 01 ^{_{$\rightarrow$}} 11 ^{_{$\rightarrow$}} 10 ^{_{$\rightarrow$}} 00 ^{_{$\rightarrow$}}......... The inputs D₀ and D₁ respectively should be connected as

The DTL, TTL, ECL and CMOS families of digital ICs are compared in the following 4 columns:

(P) (Q) (R) (S) Fanout is minimum DTL DTL TTL CMOS Power consumption is minimum TTL CMOS ECL DTL Propagation delay is minimum CMOS ECL TTL TTL
The correct column is

For the circuit shown in the following, I₀ - I₃ are inputs to the 4 : 1 multiplexers, R (MSB) and S are control bits. The output Z can be represented by

In an 8085 microprocessor, the instruction CMP B has been executed while the content of the accumulator is less than that of register B. As a result,

It is desired to multiply the numbers 0AH by 0BH and store the result in the accumulator. The numbers are available in registers B and C respectively. A part of the 8085 program for this purpose is given below : MVI A, 00H

LOOP ------

HLT END The sequence of instructions to complete the program would be

Which of the following Boolean Expressions correctly represents the relation between P, Q, R and M₁?

In the following circuit, X is given by