Two nibble adder can be implemented by (without initial carry)

How many bits does the decimal number 52.39 require for representing in radix 2 number system?

To implement $F= A \bar B+ AB \bar C + ABCD + ABC \bar D$ using only two input NAND gates, the minimum number of gates required is

The MSB of binary and of its gray code is

In the binary number 110.101, the fractional part has value

Zero has two representations in

The octal value of hexadecimal AB123 is

For the digital circuit shown in the given figure the output $ Q_3Q_2Q_1Q_0 = 0001 $initially. After a clock pulse appear, the output $Q_3Q_2Q_1Q_0 $ will be

The function realized by the MUX is

How many gates (minimum) are needed for a 3-bit up counter using standard binary and using T flip-flop?

Assume unlimited fan-in.

The following circuit is a

Minimum SOP of ^{$\bar X \bar Y \bar Z + \bar X \bar Y Z + \bar XYZ + X \bar YZ+ XYZ$} is

The number of full and half address required to add 16-bit numbers is

In the following expression, AND and OR are arithmetic operators (42 OR 72) AND 55.

The value of this expression is

What should A and B be in order to make this circuit behave like a T-flop flop?

The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is it equivalent?

A sequential circuit has one input and one output. In the input sequence whenever a pattern 010 or 0001 is detected, the output becomes 1 when the last symbol of the pattern is received. Otherwise, the output equals to 0. What will be the minimum number of states of the equivalent state diagram of this synchronous sequential circuit?

Let $F(A, B) = \bar A + B$. Simplified expression for function $F(f(x+y, y), z)$ is

Identify the logic function performed by the circuit shown below:

In the given network of AND and OR gates

$\rho$ can be written as