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Computer Architecture - VK1

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Where are micro programmes stored?

  1. Main memory

  2. Secondary memory

  3. Cache memory

  4. Read only storage memory

  5. None of the above


Correct Option: D
Explanation:

Micro program executes the OPCODE. These programmes are available in ROS of the processor.

Micro programmes are executed to execute_____________

  1. user programme in the main memory

  2. instruction (OPCODE) in processor

  3. instruction (OPRAND) in processor

  4. program in the main memory

  5. none of the above


Correct Option: B
Explanation:

Micro programs are written to produce relevant digital signals of the given OPCODE. Hence, option (2) is correct.

Micro programmes generate the sequence of ___________________.

  1. instructions

  2. digital signals

  3. data

  4. address

  5. none of the above


Correct Option: B
Explanation:

Micro programs are written to execute the OPCODE of the instruction. Epodes are identified, and then appropriate signals for registers, accumulator, program counter, etc. are generated. These are digital signals. 

To access data/address bus, tristate buffers are used ________________

  1. to isolate the devices

  2. to share devices simultaneously

  3. to provide pipelining to the bus

  4. none of these

  5. all of the above


Correct Option: A
Explanation:

Tristate buffers have three outputs; i) 1  ii) 0  iii) open circuit (high resistance). When device is not in use, it goes in tristate condition, i.e. open circuit. This condition isolates the device from the bus. 

RISC architecture has processing speed ________________.

  1. faster than CISC

  2. same as CISC

  3. slower than CISC

  4. cannot compare the two technologies

  5. none of the above


Correct Option: C
Explanation:

Micro programs slow down the processing speed due to overheads attached with accessing them compared to direct hardware execution as done in CISC. 

RISC architecture became popular after the invention of _____________________.

  1. VLSI technology

  2. Micro programme technology

  3. Pipelining technology

  4. MSI technology

  5. None of the above


Correct Option: B
Explanation:

Micro programs allowed more than one action in a single OPCODE, thereby reducing the circuits required compared to CSIC. This helped in execution of more complex instructions in reduced circuits. So, ASIC became popular.

Cycle stealing is performed by DMA to__________________.

  1. hold CPU

  2. instruct CPU

  3. stop CPU

  4. perform without affecting CPU

  5. none of the above


Correct Option: D
Explanation:

Cycle stealing is performed during the execution cycle of CPU. At this time, CPU does not access the memory. Hence, DMA takes over the memory access operation to move data within memory. 

Cycle stealing is performed when CPU is

  1. accessing memory

  2. writing in memory

  3. in execution cycle

  4. waiting for I/O to complete

  5. none of the above


Correct Option: C
Explanation:

DMA uses the system bus for accessing the memory cells directly. So, CPU is not involved in this operation. This is possible only when CPU is not using the system bus. In execution cycle, CPU does not use the system bus. Hence, DMA does not affect the CPU and performs its operation. 

Why I/O terminals in a system are normally latched while address terminals are not?

  1. I/O needs to hold the output status even after the clock address does not.

  2. Address needs to hold status after the clock I/O does not.

  3. I/O terminals are not latched.

  4. Address terminals are latched.

  5. None of the above


Correct Option: A
Explanation:

Devices connected to I/O terminals are normally slower in access compared to the processor. So, data on the terminals may be available before the device accesses them. This data must remain on the terminal till device accesses it. This is possible only when the data is latched on the terminal. So, I/O are latched.

What is the difference between semaphore and flag?

  1. Flag is hardware bit while semaphore is the software bit.

  2. Semaphore is a hardware bit while flag is a software bit.

  3. Both semaphore and flag can be accessed using instruction.

  4. No difference at all

  5. None of the above


Correct Option: A
Explanation:

Flag is a flip flop inside the status register while semaphore is a memory cell within the programme definition. So, flag is hardwired and fixed while semaphore is software bit, and can be defined according to programme. Option 1 is correct.

What is the difference between DMA and co-processor?

  1. No difference

  2. DMA does not execute instructions while co-processor does.

  3. Co-processor does not access memory while DMA does.

  4. CPU can continue working while both DMA and co-processor are working.

  5. None of the above


Correct Option: B
Explanation:

DMA does only memory access. It does not execute instructions while co-processor is complete processor for its dedicated program. So, it executes instructions. 

Overlay concept is used to execute programmes whose size is ________________.

  1. larger than main memory

  2. same as main memory

  3. shorter than main memory

  4. overlay has nothing to do with memory

  5. none of the above


Correct Option: A
Explanation:

Overlay concept uses the free blocks of the main memory during run time to execute some portion of a program. So, when a larger size program is required to be executed, it is first fragmented in smaller continuous programmes, and those programmes are loaded and removed in/from memory as and when required.

For networking, one requires a ____ CPU in the system.

  1. specially architect

  2. normal architect

  3. micro-controllers type architect

  4. complex architect

  5. none of the above


Correct Option: B
Explanation:

Networking is mainly provided by the LAN-card, OS and other software. So, a general purpose processor can handle the networking.

Multiprogram concept differs from multitasking in ____________________

  1. all the programmes, which are executed simultaneously one by one in multitasking. Only one programme will be executed till an idle condition occurs in multiprogramming.

  2. all the programmes, which are executed simultaneously one by one in multiprogramming. Only one programme will be executed till an idle condition occurs in multitasking.

  3. both the concepts that can handle batch processing

  4. both are the same

  5. none of the above


Correct Option: A
Explanation:

In multitasking, the OS uses fixed clock for every segment of execution and executes them in cyclic manner. While in multiprogramming, another program will not be executed till CPU goes in idle cycle. Option 1 is correct.

Human body is an ideal example of

  1. multitasking

  2. multiprogramming

  3. distributed processing

  4. pipelining

  5. none of the above


Correct Option: C
Explanation:

When hands are working, eyes may look somewhere and provide visuals while feet are doing the walking. All the above operations are performed simultaneously without affecting each other and without pausing. This type of working is distributed processing. 

The architecture most suitable for cache memory implementation is

  1. 8080

  2. 8085

  3. 80486

  4. bit slice

  5. none of the above


Correct Option: C
Explanation:

Cache memory is used when pipelining is implemented in the processor architecture. 80486 architecture supports the pipelining. 

Cache memories are made of _____________

  1. MOS Device

  2. TTL Device

  3. ECL Device

  4. C-MOS Device

  5. None of the above


Correct Option: C
Explanation:

ECL can be easily implemented to have high speed memory chip. Because of its speed, it is favourable for implementing cache memory. 

Architecture of microprocessor differs from microcontroller since

  1. 8255 is not used by microcontroller, but microprocessor uses it

  2. extended RAM & ROM memory are not used in microcontroller but used in microprocessor

  3. RISC can be implemented in microprocessor, but not in microcontroller

  4. microprocessor has internal flash memory, but microcontroller does not

  5. none of the above


Correct Option: A
Explanation:

For parallel I/O operation, microprocessor uses a programmable peripheral interface (PPI) IC as controller/interface device for parallel I/O while this is internally implemented in microcontroller. So, microcontroller does not require 8255. 

Main memory gets tristate nature when tristate buffers are connected to the device

  1. both at input and output

  2. only at input

  3. only at output

  4. only at address port

  5. none of the above


Correct Option: A
Explanation:

Memory chip accepts the data bit at the input and loads it in by WR, and outputs data bit at output by RD. So, both output and input remain connected to the bus where tristate nature is required. So, these buffers are required at both input and output. 

Main memory is constructed using

  1. MOS

  2. TTL

  3. ECL

  4. JFET

  5. none of the above


Correct Option: A
Explanation:

Due to its high density, low power requirement and generally acceptable speed, MOS memories are most popularly used memories. 

Loader is used by operating system at _____ of a program.

  1. compile time

  2. code optimization time

  3. execution time

  4. text editing time

  5. none of the above


Correct Option: C
Explanation:

Loader uses the compiled and linked program to move it from secondary storage to main memory for its execution by CPU. Hence, it must be required when the program is ready for execution. Option 3 is correct.

I/O controllers are

  1. intelligent but dedicated processors

  2. to control CPU for I/O

  3. super computers

  4. dumb devices

  5. none of the above


Correct Option: A
Explanation:

I/O controllers have separate processors and dedicated instruction formats to define various dedicated operations for the specific device. They offload CPU during I/O operations.

Linker is provided to link______________

  1. local symbols/ functions

  2. global symbols/functions

  3. library functions only

  4. for execution of the program

  5. none of the above


Correct Option: B
Explanation:

The local symbols/ functions are resolved by the compiler because all references are available to compiler. But global symbols/functions cannot be resolved by the compiler because the references are not available to the compiler. These are resolved after the compilation using linker. 

Which language can be picked for writing a compiler?

  1. Assembly

  2. FORTRAN

  3. C

  4. JAVA

  5. None of the above


Correct Option: C
Explanation:

Writing a compiler requires modular and structured functions to execute compiler operations. One may also require to access the hardware directly, so such facility is required in the language. The language must also provide facility to handle complex data bases and structures with ease. C language provides all such facilities. So, it will be picked.

Buffer blocks are provided to I/O controllers to handle I/O and to

  1. save CPU time

  2. provide multitasking to I/O

  3. engage CPU till I/O is complete

  4. interrupt CPU by I/O devices

  5. none of the above


Correct Option: A
Explanation:

CPU is much faster than the I/O device. A buffer block of 4 K byte means the block can store 4K characters. Writing 4K characters in the block requires very less time for CPU while for I/O requires quite high time for accessing these 4K. CPU becomes free for sufficient time to do other part of programmes after writing a buffer, while I/O controller takes over to send characters and other commends to I/O device independent of CPU. So, the CPU time is saved. 

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