Question 1

In Direct Memory Access, _______ is responsible to manage the data transfer.

data controller
DMA controller
device driver
processor
none of the above

Answer

Correct Option: B

Question 2

Which of the following is/are the use(s) of registers in DMA controller?

Word count
Store the starting address
Status of the operation
All of the above
Only (1) and (2)

Answer

Correct Option: D

Question 3

Which of the following transfer modes does not need the CPU intervention during data transfer?

Interrupt initiated Input - Output
Direct memory access
Programmed Input - Output
Both (2) and (3)
None of the above

Answer

Correct Option: B

Question 4

How many registers does a DMA controller has?

4
3
2
1
None of the above

Answer

Correct Option: B

Question 5

Which of the following lines in a control bus is used to synchronize the data between the CPU and a device?

Transfer ACK
Bus request
Bus grant
Interrupt request
Clock signals

Answer

Correct Option: E

Question 6

Which of the following buses is used to carry commands from the CPU?

Address bus
Control bus
Data bus
Memory bus
Both (1) and (2)

Answer

Correct Option: B

Question 7

Which of the following buses is responsible to transfer the data to and from the memory or from the CPU to other components of the computer system?

Address bus
Control bus
Data bus
Both (2) and (3)
None of the above

Answer

Correct Option: C

Question 8

Which of the following buses is used to find the information about the devices, which are going to communicate with the CPU?

Address bus
Control bus
Data bus
Memory bus
None of the above

Answer

Correct Option: A

Question 9

Which of the following is the role of Memory Data Register (MDR)?

It is used to store the memory address from which data will be fetched to the CPU.
It is used to store the memory address to which the data will sent and stored.
It is used to hold the memory data for the data bus.
It is used to store the data in main memory.
None of the above

Answer

Correct Option: C

Question 10

Which of the following registers holds the current instruction being executed?

Program Counter
Memory Address Register
Memory Data Register
Interrupt Register
None of the above

Answer

Correct Option: E

Question 11

Which of the following is a false statement?

The stack pointer (SP) is used to hold the address of top of element of the stack.
A stack can be implemented in a random access memory (RAM) attached to a CPU.
A stack is incremented after fetching an instruction.
A stack can be arranged in a collection of registers.
None of the above

Answer

Correct Option: C

Question 12

Which of the following registers contains the result of arithmetic and logical operations?

Program Counter (PC)
Current Instruction Register (CIR)
Status Register
Accumulator
Interrupt Register

Answer

Correct Option: D

Question 13

Which of the following uses RISC (Reduced Instructions Set Computer)?

Smartphone
Tablet
Computer
All of the above
Both (1) and (2)

Answer

Correct Option: D

Question 14

Which of the following statement(s) is/are not true?

CISC (Complex Instruction Set Computer) emphasis on hardware.
RISC (Reduced Instruction Set Computer) emphasis on software.
RISC software based instruction set has more then one clock to execute the micro program.
CISC includes multi-clock complex instructions.
None of the above

Answer

Correct Option: E

Question 15

How many bits for an instruction set does an Advanced RISC Machine (ARM) have?

16 bits
32 bits
64 bits
128 bits
12 bits

Answer

Correct Option: B

Question 16

Which of the following is an example of RISC (Reduced Instruction Set Computer) processor?

Pentium
Pentium II
MIPS
Intel 386
All of the above

Answer

Correct Option: E

Question 17

Which of the following is/are true statement(s)?

Serial data transfer communication has slower speed as compared to parallel data transfer communication.
Parallel data transfer communication has short distance.
Serial data transfer communication has longer distance.
All of the above
Both (1) and (2)

Answer

Correct Option: D

Question 18

Which of the following is not a characteristic of RISC (Reduced Instruction Set computer) processor?

It has relatively few instructions.
It has relatively few addressing modes.
It has fixed length instructions.
It has a single cycle instruction execution.
None of the above

Answer

Correct Option: E

Description: This test consists of questions related to Computer Architecture concept, practice questions for Information Technology, GATE exam preparation
Number of Questions: 18
Created by: Sara Dalvi
Tags: cs gate computer Computer Architecture questions CA questions IT questions Architecture questions Computer Architect

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