Computer Organization and Architecture (NCO)
| Description: CO | |
| Number of Questions: 15 | |
| Created by: Sanjiv Memon | |
| Tags: COA Computer Architect |
___________ bus permanently assigns to either one function or to a physical subset of components.
The state in instruction cycle that determines the address of the next instruction to be executed is
The _______________ component of 8085 microprocessor is a collection of registers that are user-visible and help to store the operands or result of the operation.
The _________ design issue in designing an instruction set takes care of instruction length, number of addresses, size of various fields and so on.
The __________ register of the CPU contains a word of data to be written to memory or the word most recently used.
The _____________ is a method in which a computer makes it possible to call and return values from subroutines.
The ____________ task performed by the CPU is the one in which the results of an execution may require writing data to memory or an I/O module.
_______________ memory cell uses a single transistor and a capacitor to store a bit of data.
The _____________ in accessing RAM consists of the access time plus any additional time required before a second access can commence.
_____________ in computer architecture implements a stack with registers and the operands of the ALU are always the top two registers of the stack, and the result from the ALU is stored in the top register of the stack.
The ___________ in the allocation of addressing bits determines that each operand may require its own mode indicator or the use of indicator is limited to one of the address fields.
The _____________ type of memory access is the one in which each addressable location in memory has a unique physically wired in addressing mechanism.
The ____________ flag bits supported by the 8085 CPU are set when the result of ALU operation is zero.
The ______________ DMA transfer mode is the one in which DMA transfers at the fastest possible rate as long as the I/O device asserts its DMA request.
The ____________ addressing mode is the one in which the operand is in memory location and the address of this location is given explicitly in the instruction.